Home > Search Results: keywords:"AXI"
Search:
Search Tips :: Advanced Search
Search collections:
Sort by: Display results: Output format:
National Repository of Grey Literature 4 records found  Search took 0.00 seconds. 
FPGA IP core for Sony IMX sensor interface
 Musil, Milan ; Kováč, Michal (referee) ; Kubíček, Michal (advisor)
The diploma thesis deals with the implementation of the SLVS-EC interface into the FPGA. This interface is used in new SONY’s image sensors for high-speed data transmission. The introduction contains a description of the interface, its possible configurations and comparison with the sub LVDS interface used so far. This is followed by the selection of a suitable MPSoC with the Zynq Ultrascale+ architecture with focus to its hardware resources for receiving a high/speed signal. The main part of this thesis deals with the design of receiver for the SLVS-EC interface and decoding of the data. The raw image data is then stored in external RAM. At the end of this thesis is described the chosen methods of testing partial parts and overall design.
Detailed record
FPGA IP core for Sony IMX sensor interface
 Musil, Milan ; Kováč, Michal (referee) ; Kubíček, Michal (advisor)
The diploma thesis deals with the implementation of the SLVS-EC interface into the FPGA. This interface is used in new SONY’s image sensors for high-speed data transmission. The introduction contains a description of the interface, its possible configurations and comparison with the sub LVDS interface used so far. This is followed by the selection of a suitable MPSoC with the Zynq Ultrascale+ architecture with focus to its hardware resources for receiving a high/speed signal. The main part of this thesis deals with the design of receiver for the SLVS-EC interface and decoding of the data. The raw image data is then stored in external RAM. At the end of this thesis is described the chosen methods of testing partial parts and overall design.
Detailed record
FPGA Module for Fast Waveform Generation and Synchronous Data Acquisition
 Eliáš, Josef
This article deals with system for fast waveform generation and synchronous data acquisition. System is used for evaluation of optical sensors by sweep through narrow band light source. The DAQ system use dual core ARM processor with build in FPGA array. We can achieve direct sharing memory between ARM core and AD/DA periphery through SoC architecture. Then we can optimally distributed core usage between processors and peripherals.
Detailed record
HW/SW Codesign for the Xilinx Zynq Platform
 Viktorin, Jan ; Košař, Vlastimil (referee) ; Korček, Pavol (advisor)
This work describes a novel approach of HW/SW codesign on the Xilinx Zynq and similar platforms. It deals with interconnections between the Processing System (ARM Cortex-A9 MPCore) and the Programmable Logic (FPGA) to find an abstract and universal way to develop applications that are partially offloaded into the programmable hardware and that run in the Linux operating system. For that purpose a framework for HW/SW codesign on the Zynq and similar platforms is designed. No such framework is currently available.
Detailed record

Interested in being notified about new results for this query?
Subscribe to the RSS feed.
Digital Repository :: Search :: Submit :: Personalize :: Help
Powered by Invenio v1.1.2
Maintained by admin.invenio@techlib.cz
This site is also available in the following languages:
Česky  English